Jump to Content
CERN
Accelerating science
Sign in
Directory
Home
News | Events
News
Events Calendar
Upcoming events
Past Events
About CERN openlab
About CERN openlab
History
Collaboration Members
Collaborating with us
Structure
Projects
openlab V [2015-2017]
Data Acquisition (online)
Data Analytics
Data Storage Architectures
Compute Management and Provisioning
Computing Platforms (offline)
Networks and Connectivity
Intel Innovation Management and Entrepreneurship
openlab IV [2012-2014]
Automation and Controls
Database
Networking
Platform
Storage Architecture
Project with Contributor
Project with Associate
ICE-DIP Project
Knowledge-sharing projects
Publications
All Publications
Presentations
Technical Documents
Education
Summer Students Programme
About the Programme
Summer Students News
Events and Visits
How To Apply
Summer Students Lectures
Summer Students Reports
Seminars
Workshops
Resources
Overview
Annual Reports
Press Releases
Press Coverage
Videos
Sponsors Spotlights
Collaboration Members
Overview
Industry Members
Huawei
Intel
Oracle
Siemens
Rackspace
Extreme Networks
Comtrade
Open Systems AG
Yandex
Research Members
EMBL European Bioinformatics Institute
ESPREVMED
Fermilab
GSI Helmholtz Centre for Heavy Ion Research
INFN National Institute for Nuclear Physics
IVI
King’s College London
Newcastle University
SCimPULSE
Jobs
TEP
Press
Search
You are here
Home
» Porting LHC detector simulations on Intel Xeon...
Porting LHC detector simulations on Intel Xeon and Xeon Phi architectures
Author(s):
A. Gheata
Date presented:
Sunday, 15 November, 2015
Event presented at:
Intel HPC Developers Conference - Austin, TX, November 14-15, 2015
For more information about the event
Presentation file:
SC15_GeantV.pptx
Send by email
PDF version
